Field of the Invention
Embodiments of the present invention generally relate to methods and hardware used to manufacture Group III-V containing devices, such as power devices, light emitting diodes (LEDs) and laser diodes (LDs).
Description of the Related Art
Group III-V materials are finding greater importance in the development and fabrication of a variety of semiconductor devices, such as power devices, including high power, high frequency, high temperature transistors and integrated circuits, LEDs or LDs. Group III-V materials are also playing an ever increasing role in the semiconductor and related industries. Often, group III-V materials are difficult to grow or deposit on foreign substrates (known as heteroepitaxy) without the formation of crystalline defects or cracks. The inclusion of one or more interfacial layers, or buffer layers, that are disposed between a surface of a substrate and a device layer provides many advantages in reducing defects and/or improving device functionality. However, the formation of high quality group III-V containing layers is challenging and are often very sensitive to process conditions of the deposition process. Avoiding interaction of a sensitive group III-V film with potential damaging conditions, however, is also not straightforward in many applications.
FIG. 1 illustrates an example of a conventional power semiconductor device 10 that includes a group III-nitride based heterojunction 15 disposed over a substrate 12. Heterojunction 15 includes a first III-nitride semiconductor layer 14, and a second III-nitride semiconductor layer 16 over first III-nitride semiconductor layer 14. A first power electrode 18 (i.e. source electrode) and a second power electrode 20 (i.e. drain electrode) are electrically connected to the first and second III-nitride semiconductor layers through a direct ohmic connection or any other suitable means. A gate structure 22 is disposed between first power electrode 18 and second power electrode 20 over second III-nitride semiconductor body 14. Gate structure 22 may include gate electrode 23 which is connected to second III-nitride semiconductor layer 16. Alternatively, gate structure 22 may include a Schottky type gate electrode connected to second III-nitride semiconductor body 16. In most conventional configurations, the first III-nitride semiconductor layer 14 may be a gallium nitride (GaN) layer and the second III-nitride semiconductor layer 16 may be an aluminum gallium nitride (AlGaN), which are disposed over a substrate 12 that is formed from a sapphire material. In some configurations the insulation layer 25 may contain silicon nitride (SiN) and the first power electrode 18, second power electrode 20 and the gate electrode 23 all comprise a metal containing layer.
One method that has been used for depositing Group III-nitrides, such as GaN, to form the active layers of a power device, LED or LD device is metal organic chemical vapor deposition (MOCVD) or hydride vapor phase epitaxy (HVPE). These deposition methods are generally performed in a reactor having a temperature controlled environment to assure the stability of precursor gases, which contains at least one element from Group III. The precursor gases are injected into a processing zone within the reactor, where they mix and move towards a heated substrate in the processing zone. A carrier gas may be used to assist in the transport of the precursor gases towards the substrate. The precursor gases react at the surface of the heated substrate to form a Group III-nitride layer, such as GaN, on the substrate surface. The quality of the film depends in part upon quality of the deposited film at the interfacial region of the deposited layer and the substrate, the properties of the deposited film, the cleanliness of the substrate surface and type of material from which the substrate is formed.
While the feasibility of using GaN to form part of a power device, LED device or LD device has been known for decades, there were numerous technical barriers that impeded their practical fabrication. For example, material differences between the sapphire or silicon substrate and Group III-nitride layers, such as the lattice constant, thermal expansion coefficient, surface contamination on the substrate surface 12A and interfacial surface energy, may create dislocations that may propagate through the formed structure and degrade the formed device's performance. Various types of buffer layers have been used in between the substrate and the Group III-nitride layer to modify the surface energy of the underlying substrate, alleviate the intrinsic stress within the lattice-matched nitride layers, and provide nucleation sites for epitaxial growth of the subsequent layers. However, the quality of conventional Group III-nitrides is generally not well controlled which may lead to unsatisfactory film properties (e.g., thickness variation, nuclei density, nuclei size, etc.) and device performance. Any slight changes in growth parameters during the nucleation could easily affect the subsequent nitride layer quality, which in turn leads to twist or mis-alignment of nucleation islands before they coalescence, thereby adversely affecting the growth of the subsequently deposited bulk Group III nitrides used to form the active parts, such as the group III-nitride based heterojunction 15, of the formed device.
As the demand for power devices, LEDs, LDs, transistors, and integrated circuits increases, the task of depositing high quality Group III-nitride films takes on greater importance. Therefore, there is a need for a process and apparatus that can form a high quality buffer layer that promotes the growth of a low defect density high quality Group-III nitride layers over a substrate.